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Foundation - SV for RTL Design

Learn the concepts of SystemVerilog for RTL Design online with Maven Silicon

5
(9 ratings)
Course Instructors Maven Silicon Deepika Paramesh Nelavalli Kaveri Chandana Maven Silicon Training Support

₹199.00 ₹4999.00 96% OFF

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Course Overview

Welcome to the course SystemVerilog for RTL Design - Your Comprehensive learning covering various aspects of SystemVerilog as a RTL Language

Schedule of Classes

Course Curriculum

1 Subject

SystemVerilog For RTL Design

12 Learning Materials

SV for RTL Design

Introduction_to_SV_for_design

Video
3:47
FREE

Data_types

Video
19:53

Operators

Video
11:54

Procedural_blocks

Video
12:34

Procedural_statements

Video
16:9

Feedback Form

External Link

Tasks and Functions

Video
15:46

Packages

Video
6:38

Arrays

Video
13:35

Interfaces

Video
23:2

Case Study

Case study

Video
6:57

Feedback Form - Overall Experience

Feedback Form - Overall Experience

External Link

Course Instructor

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Maven Silicon

303 Courses   •   344990 Students


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Deepika

1 Courses   •   2 Students

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Paramesh Nelavalli

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Kaveri

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Chandana

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Maven Silicon Training Support

47 Courses   •   3507 Students

Ratings & Reviews

5 /5

9 ratings

1 reviews

5

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4

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3

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2

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AS
Amruta Sangale

2 months ago

Really good course for foundation of SV
JS
Jaya Shree D

4 months ago

K
Kaveri

4 months ago