Physical Design Internship
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Course Overview
Course Curriculum
1 Subject
Physical Design Internship
8 Exercises • 45 Learning Materials
Introduction to VLSI & ASIC Design Flow
Why SoC?
Mobile SoC Architecture
SoC Design Process
Moores Law, ASIC Vs FPGA
VLSI Design Flow
Knowledge Check : Introduction to VLSI
Introduction to Linux Operating System & vi Text Editor
Introduction to Linux Operating System
vi Text Editor
Knowledge check: Linux
Introduction to Physical Design
Intro to VLSI
Design Styles
Partitioning
Floor-planning
placement
CTS
Routing
Static Timing Analysis (STA)
Knowledge Check : Introduction to PD
Static Timing Analysis
Why & What is Timing Analysis?
Types of Timing Analysis
False Paths & Multi Cycle Paths
STA in Design Flow
Clock - Part -1
Clock - Part - 2
Timing Parameters in STA - Part-1
Timing Parameters in STA - Part-2
Timing Parameters in STA - Part-3
Timing Analysis on Sequential Circuits - Part-1
Timing Analysis on Sequential Circuits - Part-2
STA Proceedure
Different Techniques to improve timing
Knowledge Check : STA
Floorplanning
What is Floorplanning
Die Size Estimation and Utilization
Aspect Ratio
Initialize Floorplanning
Knowledge Check : Floorplan
Placement
Introduction to Placement
Placement Flow
Routing Resources and Congestion
Knowledge Check : Placement
Routing
Routing
Routing Flow
Metal Layer Stacks
Knowledge Check: routing
Q-Flow
Q-Flow Installation Guide
Synthesis Using Yosys Tool
Physical Design Implementation of SPI using Qflow
EDA Tools User Guide
Must read Instruction manual
Virtualbox_Ubuntu - Installation Guide
Installation guide for Virtual Box and Ubuntu in Windows
Verilog RTL code of SPI Protocol
Module Test : PDI
Module Test
Course Instructor
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Maven Silicon
1801 Courses • 215884 Students
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