VLSI Design Methodologies
Dive into VLSI design methodologies at Maven Silicon. Explore principles, optimization strategies, and the latest advancements for creating cutting-edge electronic circuits.
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Course Overview
Welcome to the VLSI Design Methodologies course – your comprehensive journey into mastering the essentials of VLSI. From Digital Electronics to Verilog HDL and hands-on labs, this course covers a range of modules designed to equip you with the skills needed for effective VLSI design. Engage in hands-on activities and assignments to reinforce your knowledge and emerge ready to tackle VLSI challenges. Join us on this insightful exploration into the world of VLSI Design Methodologies!
Course Curriculum
3 Subjects
VLSI Design Methodologies
17 Exercises • 44 Learning Materials
Getting you familiar with course
Getting you familiar with VLSI Design Methodologies course
Introduction to VLSI & SoC Design
Electronic System
Smartphone - SoC - Architecture
SoC Design
ASIC Vs FPGA
Knowledge Check : Introduction to VLSI
ASIC Design Flow
ASIC Design Flow - Part-1 (Specification)
ASIC Design Flow - Part-2 (Architecture to RTL Design)
ASIC Design Flow - Part-3 (Verification to Gate Level Simulation)
ASIC Design Flow - Part-4 (DFT to STA)
ASIC Design Flow - Part-5 (Layout to GDS - II and AMS Flow)
Digital Reference Book
Digital Design Reference Book
Digital Electronics
Introduction to Digital Electronics
Number Systems and Codes
Number Systems and Codes
Knowledge Check : Number Systems and Codes
Logic Circuits
Logic Circuits
Knowledge Check: Logic Circuits
Combinational Circuits
Combinational Circuits - I
Knowledge Check : Combinational Logic Circuits - 1
Combinational Circuits - II
Knowledge Check : Combinational Logic Circuits - 2
Sequential Circuits
Sequential Circuits - I
Knowledge Check : Sequential Circuits - 1
Sequential Circuits - II
Knowledge Check : Sequential Circuits - 2
Finite State Machines
FSM
Knowledge Check : FSM
Memories
Memories
Knowledge Check : Memories
Reference Material
Verilog HDL Reference Book
Introduction to Verilog HDL
Verilog_Course_Agenda
VerilogHDL_Introduction
Knowledge Check - Introduction to Verilog HDL
Data Types
Data Types
Knowledge Check - Data Types
Verilog Operators
Verilog Operators
Knowledge Check - Verilog Operators
Advanced Verilog for Verification
Advance Verilog for Verification
Knowledge Check - Verilog for Verification
Assignments
Assignments
Knowledge Check - Assignments
Structured Procedures
Structured Procedures
Knowledge Check - Structured Procedures
Synthesis Coding Style
Synthesis Coding Style
Knowledge Check - Synthesis Coding Style
Finite State Machine
Finite State Machine
Knowledge Check - Finite State Machine
Feedback Form
Feedback Form
Summary - Verilog HDL
Summary
Verilog Labs
Instructions - Verilog Labs
EDA Tools - Installation Guide
Verilog Lab Manual
Verilog Labs Folder - Download
EDA Tools - User Guide
Solution to Lab 1
Solution to Lab 2
Solution to Lab 3
Solution to Lab 4
Solution to Lab 5
Solution to Lab 6
Solutions - Verilog Labs - Download
Digital Design - Hands On
18 Learning Materials
Digital Electronics
Introduction to Digital Electronics
Number Systems and Codes
Assignment 1
Solution to Assignment 1
Logic Circuits
Assignment 2
Solution to Assignment 2
Combinational Circuits
Assignment 3
Solution to Assignment 3
Assignment 4
Solution to Assignment 4
Sequential Circuits
Assignment 5
Solution to Assignment 5
Assignment 6
Solution to Assignment 6
Finite State Machines
Assignment 7
Solution to Assignment 7
Feedback Form
Feedback Form
Memories
Assignment 8
Solution to Assignment 8
Verilog HDL - Hands On
5 Learning Materials
Verilog HDL Review
Verilog HDL Summary
Verilog RTL Coding Examples
Feedback Form
Feedback Form
Verilog Project
Explanation to Project Specification
Alarm Clock Project Specification
Course Instructor
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Maven Silicon
248 Courses • 300530 Students
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