VLSI Physical Design Course
$299 $599 50% OFF
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Course Overview
Course Curriculum
1 Subject
Physical Design Course
9 Exercises • 42 Learning Materials
Introduction to VLSI & ASIC Design Flow
Why SoC?
Mobile SoC Architecture
SoC Design Process
Moores Law, ASIC Vs FPGA
VLSI Design Flow
Knowledge Check : Introduction to VLSI
Introduction to Linux Operating System & vi Text Editor
Introduction to Linux Operating System
vi Text Editor
Knowledge check: Linux
Introduction to Physical Design
Intro to VLSI
Design Styles
Partitioning
Floor-planning
placement
CTS
Routing
Static Timing Analysis (STA)
Knowledge Check : Introduction to PD
Synthesis and PDKs
Library file (.lib or .db)
Technology File
Layout Vs Frame View
What is Synthesis
TCL/TK
Static Timing Analysis
Why & What is Timing Analysis?
Types of Timing Analysis
STA in Design Flow
Knowledge Check : STA
DFT - Basics
What is DFT?
Classification of DFT Techniques
Structured DFT Techniques
Knowledge check: DFT techniques
Floorplanning
What is Floorplanning
Die Size Estimation and Utilization
Aspect Ratio
Knowledge Check : Floorplan
Placement
Introduction to Placement
Placement Flow
Knowledge Check : Placement
Clock Tree Synthesis
Clock Tree Synthesis - Concept
What is Clock
What is Clock Tree Synthesis
Knowledge Check : Clock Tree Synthesis
Routing
Routing
Routing Flow
Knowledge Check: routing
Q-Flow
Q-Flow Installation Guide
Synthesis Using Yosys Tool
Physical Design Implementation of SPI using Qflow
Verilog RTL code of SPI Protocol
EDA Tools User Guide
Must read Instruction manual
Virtualbox_Ubuntu - Installation Guide
Installation guide for Virtual Box and Ubuntu in Windows
Course Instructor
Sweety Dharamdasani
158 Courses • 3003 Students
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