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VLSI Physical Design Internship

Explore VLSI Physical Design Internship opportunities at Maven Silicon for hands-on expertise in real-world projects.

4.4
(19 ratings)
Course Instructors Maven Silicon Deepika Paramesh Nelavalli Kaveri Chandana Maven Silicon Training Support
To enroll in this course, please contact the Admin
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Course Overview

Embark on the Physical Design Internship, a comprehensive program guiding you through the intricacies of VLSI physical design. From Linux basics to detailed exercises in Placement, DFT, Floorplanning, Routing, Synthesis, and PDKs, gain practical insights. Conclude with an exploration of Timing Constraints, a module test, and a broad overview of Physical Design.

Course Curriculum

8 Subjects

Linux Operating System

1 Exercises7 Learning Materials

Introduction to Linux Operating System & vi Text Editor

Introduction to Linux Operating System

Video
1:15:00

vi Text Editor

Video
31:00

Knowledge check: Linux

Exercise

Labs User Guide & VPN Configuration Guide

Linux Labs User Guide

PDF

VPN_Configuration_Guide

PDF

Linux Lab Manual

PDF

Linux Lab 1 : Solution

Video
8:26

Linux Lab 2 : Solution

Video
5:15

Introduction to VLSI

1 Exercises9 Learning Materials

Introduction to VLSI & SoC Design

Electronic System

Video
26:43

Smartphone - SoC - Architecture

Video
9:55

SoC Design

Video
16:59

ASIC Vs FPGA

Video
12:7

Knowledge Check : Introduction to VLSI

Exercise

ASIC Design Flow

ASIC Design Flow - Part-1 (Specification)

Video
13:4

ASIC Design Flow - Part-2 (Architecture to RTL Design)

Video
9:32

ASIC Design Flow - Part-3 (Verification to Gate Level Simulation)

Video
9:5

ASIC Design Flow - Part-4 (DFT to STA)

Video
10:7

ASIC Design Flow - Part-5 (Layout to GDS - II and AMS Flow)

Video
14:3

Placement

1 Exercises8 Learning Materials

Placement

Introduction to Placement

Video
4:14

Placement Flow

Video
7:10

Routing Resources and Congestion

Video
4:30

Timing Vs Congestion Driven Placement

Video
5:47

Floorplan settings to reduce congestion

Video
2:26

HFNS Gate Sizing and Cloning Scan chain Reordering

Video
3:55

Knowledge Check : Placement

Exercise

Reference Book : Placement

Placement

PDF

Physical Only Cells

PDF

Design for Testability

1 Exercises20 Learning Materials

DFT Theory

Introduction to DFT

Video
11:15

Types of Testing

Video
8:24

Basic Testing Principles

Video
11:39

Fault Collapsing

Video
12:27

What is DFT?

Video
10:50

DFT Techniques - Ad-hoc Techniques

Video
10:15

DFT Techniques- Structured Techniques

Video
9:15

BIST & boundary Scan

Video
12:8

Introduction to BIST, LBIST & MBIST

Video
19:59

Knowledge check: DFT

Exercise

DFT Reference Book

DFT Reference Book

PDF

Tessent Shell - Introduction

Introduction to Tessent Shell

Video
3:37

System Modes

Video
3:13

TSDB

Video
5:23

DFT lab Solutions

Lab 01 : MBIST

Video
16:16

Lab 02 : DRC

Video
16:56

Lab 03 : Boundary Scan

Video
8:49

Lab 04 : Scan Chain

Video
9:23

Lab 05 : IJTAG

Video
16:40

Lab 06 : EDT

Video
10:6

DFT Lab Manual

PDF

Floorplanning

2 Exercises14 Learning Materials

Floorplanning

What is Floorplanning

Video
4:37

Die Size Estimation and Utilization

Video
2:45

Aspect Ratio

Video
4:28

Initialize Floorplanning

Video
1:52

Macros

Video
3:39

Good and Bad Floorplan

Video
3:20

Placement Blockages

Video
3:46

Guidelines for Good Floorplan

Video
1:43

Knowledge Check : Floorplan

Exercise

Reference Book : Floorplanning

Ref: FloorPlanning

PDF

Powerplanning

Powerplanning Introduction

Video
5:5

Power Network Synthesis

Video
10:40

Running PNS

Video
5:4

Power Calculations

Video
2:48

Reference Book : Powerplanning

Power Planning

PDF

Knowledge Check : Powerplanning

Knowledge Check : Powerplanning

Exercise

Routing

2 Exercises4 Learning Materials

Routing

Routing

Video
2:16

Routing Flow

Video
3:37

Metal Layer Stacks

Video
1:57

Knowledge Check: routing

Exercise

Reference Book : Routing

Routing

PDF

Module Test 3: Floorplanning, Powerplanning, Placement, CTS, Routing

Module test 3: Floorplanning, Powerplan, Placement, CTS, Routing

Exercise

Synthesis and PDKs

2 Exercises24 Learning Materials

Libraries and PDKs

Process Design Kits (PDKs)

Video
10:24

NDM Libraries

Video
4:00

Library query

Video
026

Library file (.lib)

Video
1:40

Technology File (.tf)

Video
1:59

Layout Vs Frame View (lef Vs frame)

Video
3:12

Synthesis

SoC Design Flow -- Various abstraction levels

Video
4:19

What is Synthesis

Video
2:14

Synthesis Flow

Video
2:9

Knowledge Check : Synthesis and PDKs

Knowledge Check : Synthesis and PDKs

Exercise

Feedback Form - PD

Feedback Form - PD Theory & Labs

External Link

Defining Timing Constraints using SDC

Defining Timing Constraints Using SDC

Video
2:36

Why SDC is so Important

Video
3:1

Different Sections of SDC -- Header

Video
2:36

Timing Constraints -- Base Generated and Virtual Clocks

Video
5:24

System Interface Commands

Video
2:39

Design Rule Constraints

Video
1:43

Timing Constraints -- Group path Uncertainty Jitter Latency

Video
4:29

Timing Constraints -- set input delay and set output delay

Video
3:34

Clock Domain Crossing (CDC)

Video
4:42

Timing Exceptions

Video
4:45

SDC Commands Classification in Fusion Compiler

Video
2:16

Module Test : Intro to PD, CMOS , Synthesis & PDK and DFT

Module Test : Intro to PD, CMOS , Synthesis & PDK andDFT

Exercise

Reference Books

Ref: Synthesis

PDF

Ref: Libraries and PDKs

PDF

Ref: SDC

PDF

Introduction to Physical Design

1 Exercises9 Learning Materials

Introduction to Physical Design

Intro to VLSI

Video
6:19

Design Styles

Video
9:36

Partitioning

Video
5:12

Floor-planning

Video
5:34

placement

Video
5:34

CTS

Video
6:35

Routing

Video
4:21

Static Timing Analysis (STA)

Video
5:24

Knowledge Check : Introduction to PD

Exercise

Reference Book : Introduction to Physical Design

Introduction to Physical Design

PDF

Course Instructor

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Maven Silicon

304 Courses   •   352201 Students


tutor image

Deepika

1 Courses   •   2 Students

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Paramesh Nelavalli

tutor image

Kaveri

tutor image

Chandana

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Maven Silicon Training Support

47 Courses   •   3698 Students

Ratings & Reviews

4.4 /5

19 ratings

6 reviews

5

48%

4

47%

3

5%

2

0%

1

0%
RP
Raveena P R

4 months ago

E
Eresh

6 months ago

YS
Yenimireddy Sandhya

6 months ago

FAQ's

1. What is a VLSI physical design internship program?

A VLSI physical design internship program offers students or fresh graduates hands-on experience in physical design aspects of VLSI (Very Large Scale Integration). It involves working with design tools and techniques related to layout, placement, routing, and verification. Interns learn how to optimize designs for performance, area, and power while understanding the physical constraints and challenges involved in chip design.

2. Who is eligible for the VLSI physical design internship program?

The VLSI physical design internship program is open to engineering students or graduates with a background in VLSI design, electrical engineering, or related fields. A basic understanding of digital design, knowledge of tools like Cadence or Synopsys, and interest in semiconductor design are essential for eligibility.

3. What skills will I gain from the physical design internship program?

During the internship, you will gain skills in physical design flow, including RTL-to-GDSII, floorplanning, placement, clock tree synthesis, routing, and verification. You will also work with industry-standard tools for design and verification and learn how to manage physical constraints like power, area, and signal integrity.

4. Is the physical design internship available online?

Yes, some institutions and companies offer online physical design internships, allowing you to work remotely while gaining valuable experience. These programs typically involve virtual sessions, tool access, and collaborative projects, providing flexibility for students worldwide.

5. Can I receive certification after completing the physical design internship?

Many VLSI physical design internship programs offer certification upon successful completion. The certification can add value to your resume and showcase your proficiency in VLSI physical design and related areas.

6. What is a Physical Design Internship with Certification?

A Physical Design Internship with Certification is an internship program where, upon successful completion, interns receive a certification that validates their knowledge and practical experience in physical design for VLSI circuits, making them more competitive in the job market.

7. What is an Internship for VLSI Physical Design Students?

An Internship for VLSI Physical Design Students provides practical exposure to various physical design processes in VLSI, such as floorplanning, clock tree synthesis, place-and-route, and layout optimization, offering students a real-world experience in the field.

8. What is an Advanced Physical Design Internship?

An Advanced Physical Design Internship focuses on complex topics in VLSI physical design, such as advanced routing techniques, power grid optimization, 3D IC design, and performance analysis.

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