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Universal Verification Methodology

  • 5.0 | 21 Ratings
  • 354 Students enrolled
  • Certified course

About Course

  Language English

This UVM hands-on course begins with a good overview of UVM methodology, explaining the concepts like agents and UVCs with various examples like AHB UVCs and SOC UVM testbenches. With this overview it walks you through all the concepts like UVM TB frame work, base class library, factory, sequences, phases, reporting mechanism, TLM ports, virtual sequences, events, call backs, UVCs, Scoreboard,  UVM environment, etc and guide you to do the lab exercises to understand all the concepts very well. 

This course explains the need and usage of UVM with various examples like IP and SOC level testbenches. With the help of this hands-on course you can learn the nuts and bolts of UVM and grow as a UVM expert in the functional verification domain.

Course Agenda:

  • Introduction to UVM
  • Agents and UVCs
  • IP & SoC Level UVM TBs
  • AHB UVC
  • AHB UVC – Usages
  • Maven SOC – UVM TB
  • UVM TB Architecture and Base Class Hierarchy
  • UVM Factory
  • Stimulus Modelling & TB Overview
  • UVM Phases & Reporting Mechanism
  • TLM Ports and Configuration
  • Creating TB Components
  • UVM Sequences
  • Virtual Sequences & Virtual Sequencers
  • Callbacks & Events
  • Creating Scoreboard

Prerequisite: Any electronics/electrical engineering graduate with a good knowledge or experience in RTL design and verification using SystemVerilog testbenches. 

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Curriculum

  • 1: Universal Verification Methodology Overview

  • Lecture 1 Introduction to UVM 10:47
  • Lecture 2 UVM Concepts 04:37
  • Lecture 3 UVM SoC TB 08:49
  • Lecture 4 UVM AHB UVC 07:07
  • Lecture 5 UVM SoC TB Examples 05:30
  • Quiz 1 Knowledge Check - Universal Verification Methodology Overview 3 Questions
  • 2: UVM TB Architecture and Base Class Hierarchy

  • Lecture 6 UVM Testbench Architecture 13:48
  • Lecture 7 UVM Base Class Hierarchy 14:31
  • Quiz 2 Knowledge Check - UVM TB Architecture and Base Class Hierarchy 5 Questions
  • 3: UVM Factory

  • Lecture 8 UVM Factory - Importance of using factory 11:18
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Reviews

5.0
21 Ratings
5 100% 4 0% 3 0% 2 0% 1 0%
  • rama subbarao kanupuri
    11 September 2020

    Best course for any fresher, gives you the complete understanding of how uvm works and it really helped me a lot. I would definitely recommend this course for any fresher.

  • Varun Jayadev
    8 August 2020

    its good